Integrated circuit

Dear Fabien,

For IC, the temperature rise is calculated as Delta_T = P_dissipated × R_JA. It is very important for the result when the system is powered.

Where :

- Delta_T is the junction temperature rise (°C). See FIDES Guide page 67.

- P_dissipated is the power dissipated by the IC when operating (W). P_dissipated is usually lower than the rated power (see the FAQ also). This power is specific for each application.

- R_JA is the thermal resistance between junction and ambiant. (°C/W). See FIDES Guide page 59 for default calculation. Manufacturers may give more accurate data in some cases.

Regards,

Lambda

Hello

The difficulty for this calculation is to estimate the P_dissipated.
The R_JA is given in most of literature.

Using the P_rated will definitely leads you to wrong results.

The way I found to solve this problem, was to note down the temperature of each component, while the electronic board was functioning at full capacity. I directly had the delta_T with the ambient temperature.

From this experimentation came two questions:
- If the dissipated power of the board varies during a phase, should we take the maximum of the dissipated power into account or an average dissipated power?
For example: A regulating board is functioning at its maximal power during 10s then is functioning at low power the next 30s. And then starts the cycle again.

- In fact, only a few components are heating the printed circuit and by extension, all the board. So even if a component dissipates little power, it'll suffer a high rise of temperature due to its neighbour.

For this kind of component, I kept the delta_T measured, even if they would have a lower delta_T if they were alone, because they were functioning at this temperature. I still wonder if it's correct.

Regards,

vbayle

Hello,

I understand your solution, but in my case we worked on little series. And we can′t measured during test, because I work during conception, and I try to give a result before the beginning of the products.
And if I use this guide correctly, we can use it during the conception, not when the product are finished.

In an other part, when I discuss with my colleagues, we haven′t got the informations (P_dissipated and R_JA) on the data sheet.
And my question is, how we can estimate the temperature without that. Can we find their directly at supplier?

Regards,

Fabien.

Thermal analysis is a very important step in electronic design. Wether by trials or simulations, it is important to know the thermal characteristic of the product : identifying hot spot for exemple.

V.Bayle approach is very fine, but doing so gives only the case temperature (if I undersnatd well). So don′t forget that this is the junction temperature that is important for the die reliability, not only the case temperature.

The R_JA can be calculated with the FIDES Guide model (pages 59 to 62) or can be found on datasheets. The power dissipated by the component depends of its use and so must be calculated by the designer. Parts manufacturers only give a maximum rated power that will lead to a pessimistic evaluation.

Lambda

Hi,
when calculating the stress levels of the components should I take into account the maximum or an average? For example I have a gate driving circuit for IGBTs where the power dissipated in a resistor has its defined time curve, which occurs with a frequency of 5 kHz. Should I take into account the maximum peak or only the average in this period?
The power dissipated in an IC is obtained by multiplication of the supply voltage with the current drown from the supply pin?
Last question, when I have a transistor which is closed only in case of an error in the circuit (which for example occurs only 3 times in a year) how should I calculate the stress level?

Enea

Dear Enea,

Thank you for all these good questions!

1. Maximum or average?

In the case of the resistor, the influential factor is temperature. Temperature will not vary at a frequency as high as 5khz, so the observed value on a longer time period should be taken here. For other stresses, like voltage stress, the mean value is generaly the best choice. The mean acceleration of course, not the mean stress (with an AC voltage don′t take the mean voltage to calculate the stress...). A good help is to draw the curve showing the acceleration as a fonction of the stress to have in mind how the model reacts.

2. Power dissipated in an IC ?

It is not always easy to assess. The designer of a board generaly knows this parameter. Of course P=U.I. But the power supply pin is not the only one to draw current. Every active pin do. And for micro processor it is changing very fast! So this method may be used but is simple only fo simple IC.

3. Only 3 times in a year...

There is many possibilities. You may create a specific phase is the life profile to describe this situation, at least to assess if this short phase has or not an impact on the yearly reliability. I have cases, where a stressed phase that represent 1% of the time causes 90% of failures.

Nevertheless in moste case like your exemple a null stress is generaly the best choice.

1. 2. and 3.

In all of this exemples my advice will be to do a sensitivity analysis (often a short drawing is enough) to understand the model reactions and make the best choice, especially if the result has a critical impact.

All the best with FIDES!

Lambda